Test set embedding into low-power sequences based on a traveling salesman problem formulation

Current trends in VLSI designs necessitate low power during both normal system operation and testing activity. Traditional Built-in Self Test (BIST) generators rise the power consumption during testing, necessitating the addition of low-power solutions to the arsenal of BIST pattern generators. In this paper, the utilization of gray codes is investigated as a low-power BIST solution; Experimental results indicate that the investigated generators can result into shorter lower-power BIST sequences, compared to previously proposed solutions.