Optimization of the wafer level molding process for high power device module

High power modules are indispensible in our future automotive, aerospace and green & renewable energy industry. However, a lot of issues rise along with the power rising. More components are needed to increase the reliability, dissipate heat and etc. Thus, the whole packages are more complicated than the normal ones. Complicated structure including copper clips makes the molding process rather difficult. Voids are more easily to be trapped in between the pads under the chip covered by the copper clip. In our simulation, we are trying to achieve void free molding by varying the dispensing pattern, the package layout and initial diameter of molding compound on the wafer. The results show that round dispensing pattern dominates straight line dispensing pattern in the measurement of voids coverage as well as the incomplete fill. However, the four packages on the outmost of the wafer still contain high coverage of voids ratio. Therefore, the extremely high voids coverage packages are removed eventually from the wafer. In the parametric studies of diameter of the initial dispensing pattern shows that smaller diameter results in lower voids issue. A series of simulation are carried out to achieve a void free molding process.