• DocumentCode
    2529052
  • Title

    Impact of NBTI on analog components

  • Author

    Zhengliang Lv ; Milor, Linda ; Yang, Shiyuan

  • fYear
    2012
  • fDate
    28-31 May 2012
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    Summary form only given. Negative bias temperature instability (NBTI) is one of the important reliability concerns that most drastically impacts circuit performances. In the digital domain, NBTI is addressed through adding reliability guard-bands on the maximum operating frequency of data paths and on the noise margins for memory cells. As a result, NBTI limits the performance/area optimization of digital circuits. Similarly, NBTI in analog circuits must be modeled and analyzed to ensure reasonable product lifetimes. The analysis of NBTI for analog circuits is more complex, since statistical NBTI causes not just performance degradation, but also increasing mismatch. Hence, randomness in the degradation process must be handled properly for analog circuits. In this work, we present a methodology to determine the impact of statistical NBTI on analog circuits. NBTI is due to the presence of interface traps at the gate oxide interface. It causes the threshold of PMOS devices to change.
  • Keywords
    MOSFET; analogue circuits; interface states; NBTI; PMOS device; analog circuit component; data path; digital circuit optimization; gate oxide interface; maximum operating frequency; memory cell; negative bias temperature instability; noise margin; performance degradation process; product lifetime; reliability guard-band; Analog circuits; Degradation; Educational institutions; Integrated circuit modeling; Reliability; Stress; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ETS), 2012 17th IEEE European
  • Conference_Location
    Annecy
  • Print_ISBN
    978-1-4673-0696-6
  • Electronic_ISBN
    978-1-4673-0695-9
  • Type

    conf

  • DOI
    10.1109/ETS.2012.6233036
  • Filename
    6233036