DocumentCode
2533424
Title
A three-port nRERL register file for ultra-low-energy applications
Author
Kwon, Jun-Ho ; Lim, Joonho ; Chae, Soo-lk
Author_Institution
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
fYear
2000
fDate
2000
Firstpage
161
Lastpage
166
Abstract
In this paper, we propose an adiabatic register file for ultra-low-energy applications, which uses a new reversible adiabatic logic, nRERL. The nRERL register file discards garbage information with minimal energy dissipation. We designed a 16×8b three-port nRERL register file. From SPICE simulations, we found that the nRERL register file consumes less than 10% of the energy consumed in the conventional register file at a frequency of lower than 1 MHz. We also describe how to design a RAM, a large array of storage cells.
Keywords
MOS logic circuits; SPICE; circuit simulation; logic arrays; logic simulation; low-power electronics; multiport networks; RAM; SPICE simulations; adiabatic register file; garbage information; reversible adiabatic logic; three-port nRERL register file; ultra-low-energy applications; Circuits; Clocks; Energy consumption; Energy dissipation; Frequency; Logic; MOS devices; Read-write memory; Registers; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on
Print_ISBN
1-58113-190-9
Type
conf
DOI
10.1109/LPE.2000.155271
Filename
876775
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