A 1V 10b 125MSample/s A/D Converter Using Cascade Amp-Sharing and Capacitance Coupling Techniues

Author

Honda, Kazutaka ; Furuta, Fasanori ; Kawahito, Shoji

Author_Institution

Graduate Sch. of Electron. Sci. & Technol., Shizuoka Univ., Hamamatsu

fYear

2006

fDate

21-24 May 2006

Firstpage

1031

Lastpage

1034

Abstract

This paper describes a low-power low-distortion pipeline ADC with 1.0V supply voltage. A cascade amp-sharing architecture and capacitor coupling class-AB amplifier are proposed for low-power dissipation under high-speed sampling. The capacitance coupling S/H stage suppresses the distortion caused by the insufficient gate-source voltage of sampling switches due to a low supply voltage. According to H-SPICE simulation results, the 10b 125MSample/s ADC in 90nm digital CMOS process achieves SNDR of 56dB with a power dissipation of only 21mW

Keywords

amplifiers; analogue-digital conversion; capacitance; cascade networks; low-power electronics; 1 V; 21 mW; 90 nm; H-SPICE simulation; SNDR; analog-to-digital converter; capacitance coupling S/H stage; capacitance coupling techniques; capacitor coupling class-AB amplifier; cascade amp-sharing architecture; cascade amplifier sharing; digital CMOS process; distortion suppression; gate-source voltage; high-speed sampling; low-power dissipation; pipeline ADC; sampling switches; CMOS process; Capacitance; Capacitors; Coupling circuits; Pipelines; Power dissipation; Sampling methods; Signal design; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1692764

Filename

1692764