DocumentCode
2535472
Title
Multilevel flash memory on-chip error correction based on trellis coded modulation
Author
Sun, Fei ; Devarajan, Siddharth ; Rose, Ken ; Zhang, Tong
Author_Institution
Dept. of ECSE, Rensselaer Polytech. Inst.
fYear
2006
fDate
21-24 May 2006
Abstract
This paper presents a multilevel (ML) flash memory on-chip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivial modulation process in ML memory storage and the effectiveness of TCM on integrating coding with modulation to provide better performance. Using code storage 2bits/cell flash memory as a test vehicle, the effectiveness of TCM-based systems, in terms of error-correcting performance, coding redundancy, silicon cost, and operation latency, has been successfully demonstrated
Keywords
error correction; flash memories; redundancy; trellis coded modulation; multilevel flash memory; on-chip error correction system design; trellis coded modulation; Costs; Delay; Error correction codes; Flash memory; Modulation coding; Redundancy; Silicon; System testing; System-on-a-chip; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1692867
Filename
1692867
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