DocumentCode
2535979
Title
Design and implementation of an FFT processor for VDSL
Author
Rudberg, Mikael Karlsson ; Sandberg, Martin ; Ekholm, Kent
Author_Institution
Ericsson Components AB, Kista, Sweden
fYear
1998
fDate
24-27 Nov 1998
Firstpage
611
Lastpage
614
Abstract
In this paper we present an implementation of an FFT processor for VDSL applications. Since no standard yet are available for VDSL, high requirements on flexibility were put into the design. A concurrent hardware and software design methodology made it possible to trade between hardware and software realizations in order to get an effective and flexible architecture
Keywords
CMOS digital integrated circuits; VLSI; digital signal processing chips; digital subscriber lines; fast Fourier transforms; hardware-software codesign; integrated circuit design; telecommunication computing; 0.35 micron; 100 MHz; 3 W; 3.3 V; FFT processor; VDSL; concurrent hardware/software design methodology; flexible architecture; very high speed DSL; Application software; Communication system software; Computer architecture; Design methodology; Digital signal processing; Discrete Fourier transforms; Fast Fourier transforms; Frequency; Hardware; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on
Conference_Location
Chiangmai
Print_ISBN
0-7803-5146-0
Type
conf
DOI
10.1109/APCCAS.1998.743894
Filename
743894
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