• DocumentCode
    2536730
  • Title

    An FPGA based teletext inserter chip

  • Author

    Athikulwongse, Krit ; Leelarasmee, Ekachai

  • Author_Institution
    Electr. Eng. Dept., Chulalongkorn Univ., Bangkok, Thailand
  • fYear
    1998
  • fDate
    24-27 Nov 1998
  • Firstpage
    751
  • Lastpage
    754
  • Abstract
    A teletext inserter chip developed on an FPGA is presented. Together with a few number of analog IC components, the chip can be used in conjunction with a PC to forms a versatile teletext inserter. The PC is used to edit the teletext information and send the teletext data through its parallel port to the chip. The data are stored in the chip until the designated TV scan lines are reached and then shifted out serially to be inserted in the composite video signal by another analog circuit. The chip is designed by using VHDL models and synthesized on an FPGA chip with 5,000 gates equivalent complexity. It can insert up to 8 teletext data lines per TV signal field
  • Keywords
    data handling; field programmable gate arrays; telecommunication computing; teletext; FPGA based teletext inserter chip; PC parallel interface connection; TV scan lines; VHDL models; composite video signal; data shifter; teletext data insertion; Blanking; Clocks; Decoding; Digital video broadcasting; Displays; Field programmable gate arrays; Logic; TV broadcasting; TV receivers; Teletext;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1998. IEEE APCCAS 1998. The 1998 IEEE Asia-Pacific Conference on
  • Conference_Location
    Chiangmai
  • Print_ISBN
    0-7803-5146-0
  • Type

    conf

  • DOI
    10.1109/APCCAS.1998.743930
  • Filename
    743930