A low power CMOS low noise amplifier for wireless communications

Author

Ku, Kai-Wei ; Huang, Chien-Chang

Author_Institution

Dept. of Commun. Eng., Yuan Ze Univ., Taoyuan, Taiwan

Volume

1

fYear

2012

fDate

21-23 May 2012

Firstpage

19

Lastpage

22

Abstract

A low power CMOS low noise amplifier (LNA) working at 2.4 GHz for wireless communications is presented in this paper, by using TSMC 0.18 μm technology. The current reused architecture is adapted to reduce the consumed current, while the supply voltage is set to 0.6 V to meet the low-voltage requirement as well. To simplify the bias network designs under low-voltage operations, NMOS and PMOS devices are utilized with three-stage configuration to enhance the gain performance. The measured results show 17.7 dB in gain and 3.9 dB in noise figure with 0.86 mW of power consumption.

Keywords

CMOS analogue integrated circuits; MOS integrated circuits; low noise amplifiers; power consumption; radiocommunication; LNA; NMOS devices; PMOS devices; TSMC; frequency 2.4 GHz; gain 17.7 dB; gain 3.9 dB; low power CMOS low noise amplifier; low-voltage operation; low-voltage requirement; network design; power 0.86 mW; power consumption; size 0.18 mum; three-stage configuration; voltage 0.6 V; wireless communication; CMOS integrated circuits; Gain; Inductors; Logic gates; MOS devices; Noise figure; CMOS; low noise amplifier; low power; low voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Radar and Wireless Communications (MIKON), 2012 19th International Conference on

Conference_Location

Warsaw

Print_ISBN

978-1-4577-1435-1

Type

conf

DOI

10.1109/MIKON.2012.6233519

Filename

6233519