Development of readout ASIC for FPCCD vertex detector at the ILC

Author

Kato, E. ; Sato, Hikaru ; Ikeda, Hinata ; Sugimoto, Yoshiki ; Ishikawa, Akira ; Itagaki, Kenji ; Trevison, Jose ; Takubo, Yuya ; Yamamoto, Hiroshi

Author_Institution

Dept. of Phys., Tohoku Univ., Sendai, Japan

fYear

2012

fDate

Oct. 27 2012-Nov. 3 2012

Firstpage

562

Lastpage

570

Abstract

We have fabricated two new types of readout ASICs for the FPCCD vertex detector, one with a 0.35 μm CMOS process, the other with 0.25 μm CMOS process and evaluated there performance. By using a finely segmented pixel CCD of 5-by-5 μm² called FPCCD for the vertex detector, we intend to achieve high vertex resolution as well as suppress pixel occupancy, which is essential for tracking particles and performing flavor tagging at the ILC. FPCCD imposes several requirements upon the readout ASIC concerning readout speed, noise, readout precision and power consumption. The evaluation results towards these requirements are presented and issues to be resolved are discussed.

Keywords

CMOS integrated circuits; application specific integrated circuits; semiconductor counters; CMOS process; FPCCD vertex detector; finely segmented pixel CCD; flavor tagging; particle tracking; power consumption; readout ASIC development; readout precision; readout speed; suppress pixel occupancy; ASIC; CCD; ILC; vertex detector;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2012 IEEE

Conference_Location

Anaheim, CA

ISSN

1082-3654

Print_ISBN

978-1-4673-2028-3

Type

conf

DOI

10.1109/NSSMIC.2012.6551171

Filename

6551171