Rethinking reverse converter design: From algorithms to hardware components

The Residue Number System (RNS) has been recognized as a powerful tool to enhance distinct computing applications. Due to this, lots of researches have been done on RNS especially on its most challenging part, reverse converter, to achieve better circuit´s parameters. Reverse converter´s complexity makes researchers to mainly focus on suggesting new moduli sets or investigating new algorithms and arithmetic formulations to improve its performance. Although these suggested methods result in better reverse converters during the previous half century, new aspects should be considered for nowadays applications and constraints requirements. In this work, we want to rethink reverse converter design and show that efficiency can be achieved by other methods which are mainly not considered during its design. These methods are based on hardware aspects including dedicated modular addition components, hardware structure optimizations, efficient pipelining and clock gating. Each of them will be explained with their effects on reverse converter characteristics and behavior.