Triple-rail MOS current mode logic for high-speed self-timed pipeline applications

High speed and low power is the dream of circuit designers. In this paper a novel self-timed logic family is presented for high-speed self-timed pipelining applications. We developed a novel triple-rail MOS current mode logic (Tr-MCML) logic family and integrated it seamlessly with self-timed pipelines. This self-timed pipeline is designed to realize power-on-demand operations that achieve both high speed and low power, which is appropriate for the design of bus drivers, asynchronous I/Os, and infinite impulse response (IIR) filters. The ripple-carry adder is used as a testbench for verification. Simulation shows that the energy-delay product (EDP) of large digital systems can be reduced significantly