Effect of parasitic capacitance of power device on output voltage deviation during switching dead-time in voltage-fed PWM inverter

Author

Yamamoto, Kichiro ; Shinohara, Katsuji ; Ohga, Hiroyuki

Author_Institution

Dept. of Electr. & Electron. Eng., Kagoshima Univ., Japan

Volume

2

fYear

1997

fDate

3-6 Aug 1997

Firstpage

777

Abstract

The PWM inverter, which is operated at a high carrier frequency, is influenced by the switching dead-time. In this paper, the effect of the parasitic capacitance of the power device on the voltage deviation during switching dead-time is investigated and a numerical method to analyze the output voltage deviation in consideration of the parasitic capacitance of the power device is proposed. Furthermore, this method is applied to a permanent-magnet AC servo motor drive system and the voltage deviation and the phase current waveforms are calculated. Finally, the calculated results are compared with the experimental results in order to confirm the validity of the analysis

Keywords

DC-AC power convertors; PWM invertors; bipolar transistor switches; capacitance; harmonic distortion; insulated gate bipolar transistors; power bipolar transistors; power semiconductor switches; power system harmonics; switching circuits; output voltage deviation; permanent-magnet AC servo motor drive system; phase current waveforms; power IGBT switches; power device parasitic capacitance; switching dead-time; voltage-fed PWM inverter; AC motors; Frequency; Insulated gate bipolar transistors; Parasitic capacitance; Power engineering and energy; Pulse width modulation; Pulse width modulation inverters; Servomechanisms; Stators; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Conversion Conference - Nagaoka 1997., Proceedings of the

Conference_Location

Nagaoka

Print_ISBN

0-7803-3823-5

Type

conf

DOI

10.1109/PCCON.1997.638315

Filename

638315