• DocumentCode
    2552070
  • Title

    Hierarchical conditional dependency graphs for mutual exclusiveness identification

  • Author

    Kountouris, Apostolos A. ; Wolinski, Christophe

  • Author_Institution
    IRISA, Rennes, France
  • fYear
    1999
  • fDate
    7-10 Jan 1999
  • Firstpage
    146
  • Lastpage
    150
  • Abstract
    Identifying operation mutual exclusiveness is important in order to improve the quality of high-level synthesis results, by reducing either the required number of control steps or the needed hardware resources by conditional resource sharing. To this end we propose the hierarchical conditional dependency graph representation and an algorithm for identification of mutually exclusive operations. A hierarchical control organization permits one to minimize the number of pair-wise exclusiveness tests during the identification process. Using graph transformations and reasoning on arithmetic inequalities, the proposed approach can produce results independent of description styles and identify more mutually exclusive operation pairs than previous approaches
  • Keywords
    graph theory; high level synthesis; identification; arithmetic inequalities; conditional resource sharing; control steps; graph transformations; hardware resources; hierarchical conditional dependency graphs; high-level synthesis; mutual exclusiveness identification; pair-wise exclusiveness tests; Arithmetic; Binary decision diagrams; Boolean functions; Code standards; Data structures; High level synthesis; Processor scheduling; Resource management; Scheduling algorithm; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1999. Proceedings. Twelfth International Conference On
  • Conference_Location
    Goa
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-0013-7
  • Type

    conf

  • DOI
    10.1109/ICVD.1999.745139
  • Filename
    745139