• DocumentCode
    2556620
  • Title

    Wafer level electromigration applied to advanced copper/low-k dielectric process sequence integration

  • Author

    Pierce, Donald ; Educato, J. ; Rana, Vijay ; Yost, Dennis

  • Author_Institution
    Sandia Technol. Inc., Albuquerque, NM, USA
  • fYear
    1998
  • fDate
    12-15 Oct 1998
  • Firstpage
    10
  • Lastpage
    15
  • Abstract
    We have shown preliminary results from an exhaustive experimental program on the electromigration performance of advanced copper/low-k dielectric process sequences. Wafer-level electromigration test results have been shown to be consistent with package-level test results reported in the literature. These results bode well for the continuing usefulness of wafer-level electromigration as a tool for rapid evaluation of metal reliability. This is particularly important when the long-lived nature of copper metallization will constrain test resources using package-level techniques
  • Keywords
    copper; dielectric thin films; electromigration; metallisation; Cu; copper metallization; damascene process sequence integration; low-k dielectric; reliability; wafer-level electromigration test; Copper; Corrosion; Current density; Dielectric substrates; Electromigration; Etching; Fabrication; Silicon; Temperature; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 1998. IEEE International
  • Conference_Location
    Lake Tahoe, CA
  • Print_ISBN
    0-7803-4881-8
  • Type

    conf

  • DOI
    10.1109/IRWS.1998.745359
  • Filename
    745359