DocumentCode
2557306
Title
8051 CPU core optimization for low power at register transfer level
Author
Iozzi, Francesco ; Saponara, Sergio ; Morello, Alexander J. ; Fanucci, Luca
Volume
2
fYear
2005
fDate
25-28 July 2005
Firstpage
178
Lastpage
181
Keywords
CMOS technology; Clocks; Design automation; Design optimization; Embedded system; Energy consumption; Power engineering and energy; Registers; Switching circuits; Vehicle dynamics;
fLanguage
English
Publisher
ieee
Conference_Titel
Research in Microelectronics and Electronics, 2005 PhD
Print_ISBN
0-7803-9345-7
Type
conf
DOI
10.1109/RME.2005.1542966
Filename
1542966
Link To Document