• DocumentCode
    2558838
  • Title

    The design of Neural A/D converter using neuron-MOS transistor

  • Author

    Hang, Guoqiang ; Wang, Guofei ; Hu, Xiaohui

  • fYear
    2012
  • fDate
    29-31 May 2012
  • Firstpage
    485
  • Lastpage
    488
  • Abstract
    A novel circuit realization of two parallel A/D converters based on the Hopfield´s neural network is presented. The two neural A/D converters are constructed with comparators and Schmitt triggers, respectively, and they are all designed by using neuron-MOS transistors. The benefit of the proposed circuit realization with neuron-MOS transistors is that the structure of the circuit has been simplified significantly. The proposed circuits can be fabricated by standard CMOS process with a 2-ploy layer. From the HSPICE simulation results using TSMC 0.35μm double-polysilicon CMOS technology, the effectiveness of the proposed approach is validated.
  • Keywords
    CMOS integrated circuits; Hopfield neural nets; MOSFET; SPICE; analogue-digital conversion; comparators (circuits); integrated circuit design; trigger circuits; HSPICE simulation; Hopfield neural network; Schmitt trigger; TSMC double-polysilicon CMOS technology; circuit realization; comparator; neural A/D converter design; neuron-MOS transistor; size 0.35 mum; CMOS process; Hopfield neural networks; Logic gates; Neurons; Simulation; Threshold voltage; Transistors; A/D converter; Hopfield neural network; Neuron MOS transistor; Schmitt trigger;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Natural Computation (ICNC), 2012 Eighth International Conference on
  • Conference_Location
    Chongqing
  • ISSN
    2157-9555
  • Print_ISBN
    978-1-4577-2130-4
  • Type

    conf

  • DOI
    10.1109/ICNC.2012.6234650
  • Filename
    6234650