DocumentCode
2561267
Title
Design of parallelized controllers for high-performance controller-datapath systems
Author
Wang, Jiun-Ping ; Kuang, Shiann-Rong
Author_Institution
Dept. of Comput. Sci. Eng., National Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear
2005
fDate
28-30 May 2005
Firstpage
257
Lastpage
260
Abstract
The controller in a controller-datapath system plays an important role in determining the system cycle time. A new approach based on precomputation technique is proposed to parallelize the execution of controller and datapath. The parallelized controller precomputes all possible next states and urgent control outputs in each state before control inputs arrive, and then selects and stores the true next state and control outputs by the value of control inputs at the end of present state. The proposed approach removes the control path from the critical path of the system, leads to a smaller and more predictable system cycle time. Experimental results show that a significant improvement in system cycle time and system performance can be achieved while maintaining a very low area overhead.
Keywords
computer interfaces; logic design; parallel processing; high-performance controller-datapath systems; parallelized controllers; precomputation technique; Application specific integrated circuits; Clocks; Communication system control; Computer science; Control system synthesis; Control systems; Delay effects; Delay systems; Registers; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Cellular Neural Networks and Their Applications, 2005 9th International Workshop on
Print_ISBN
0-7803-9185-3
Type
conf
DOI
10.1109/CNNA.2005.1543209
Filename
1543209
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