• DocumentCode
    2566958
  • Title

    A 9GHz 65nm Intel Pentium 4 Processor Integer Execution Core

  • Author

    Wijeratne, Saminda ; Mathew, Sanu ; Anders, Mark ; Krishnamurthy, Ram ; Anderson, Jon ; Hwang, Sunyong ; Ernest, M.

  • Author_Institution
    Intel, Hillsboro, OR
  • fYear
    2006
  • fDate
    6-9 Feb. 2006
  • Firstpage
    353
  • Lastpage
    365
  • Abstract
    In a 4th-generation 65nm Intel Pentiumreg4 processor, the previously low voltage swing, 2times microprocessor frequency, AGU and ALUs are replaced with domino-logic-based architectures optimized for low latency, 2times frequency, and lower power. These redesigned AGU/ALUs reduce normalized dynamic power by 50% over the previous generation, and together with the similarly optimized integer register file, enable a 9GHz 64b integer execution core at 1.3V and 70degC
  • Keywords
    logic design; low-power electronics; microprocessor chips; 1.3 V; 65 nm; 70 C; 9 GHz; AGU; ALU; Intel Pentium 4 processor; domino logic architectures; integer register file; low voltage swing; microprocessor; Adders; Bandwidth; CMOS process; CMOS technology; Circuits; Clocks; Delay; Frequency; Low voltage; Space vector pulse width modulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0079-1
  • Type

    conf

  • DOI
    10.1109/ISSCC.2006.1696066
  • Filename
    1696066