DocumentCode
2567609
Title
Research on low power design in SOC by using charge-recovery technology
Author
Yang, Shuhui ; Li, Xuehua ; Wang, Yafei ; Qiu, Yulin
Author_Institution
Beijing Inf. S&T Univ., Beijing
fYear
2007
fDate
22-25 Oct. 2007
Firstpage
165
Lastpage
168
Abstract
Because of the function and complication of SOC ceaseless increasing, low power design in SOC is becoming more and more important. On the base of the voltage scaling technology for decreasing power of SOC, and making use of the advantage of charge-recovery technology to reduce power efficiently, this paper presents an improved adaptive voltage scaling method(IAVS),which combines the system design and the circuit design in SOC. The IAVS conquers the disadvantage of charge-recovery circuits, which need multi-pulse electrical source and it will efficiently decrease the system power dissipation.
Keywords
integrated circuit design; low-power electronics; system-on-chip; SOC; adaptive voltage scaling method; charge-recovery circuits; charge-recovery technology; circuit design; low power design; multipulse electrical source; system design; system power dissipation; voltage scaling technology; CMOS technology; Circuit synthesis; Dynamic voltage scaling; Energy consumption; Inductance; Logic circuits; RLC circuits; Switched capacitor circuits; Switches; Switching circuits; IAVS; SOC; charge-recovery; low power design; voltage scaling;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4244-1132-0
Electronic_ISBN
978-1-4244-1132-0
Type
conf
DOI
10.1109/ICASIC.2007.4415593
Filename
4415593
Link To Document