Low phase noise CMOS voltage-controlled oscillators

Author

Allstot, David J. ; Aniruddhan, Sankaran ; Chu, Min ; Neihart, Nathan M. ; Ozis, Dicle ; Shekhar, Sudip ; Walling, Jeffrey S.

Author_Institution

Univ. of Washington, Seattle

fYear

2007

fDate

22-25 Oct. 2007

Firstpage

297

Lastpage

302

Abstract

Design considerations and performance comparisons for several low phase noise CMOS voltage-controlled oscillator (VCO) topologies are presented including the Hartley, quadrature Colpitts, Clapp, and tuned-input tuned-output configurations. An indirect approach for high-frequency signal generation using a VCO coupled with a 2X passive frequency multiplier is also described. Several of the structures are attractive alternatives to the conventional LC tank VCO.

Keywords

CMOS integrated circuits; phase noise; voltage-controlled oscillators; CMOS voltage-controlled oscillators; Clapp configurations; Hartley configurations; high-frequency signal generation; low phase noise oscillators; passive frequency multiplier; quadrature Colpitts; tuned-input tuned-output configurations; voltage-controlled oscillator; 1f noise; Energy consumption; Frequency; Inductors; Phase noise; Semiconductor device modeling; Signal generators; Topology; Transformers; Voltage-controlled oscillators; Clapp oscillator; Colpitts oscillator; Hartley oscillator; Voltage-controlled oscillator; dual-tank oscillator; phase noise transformer; tuned-input tuned-output oscillator;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2007. ASICON '07. 7th International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4244-1132-0

Electronic_ISBN

978-1-4244-1132-0

Type

conf

DOI

10.1109/ICASIC.2007.4415626

Filename

4415626