FPGA level in-hardware verification for DO-254 compliance

RTCA/DO-254, "Design Assurance Guidance for Airborne Electronic Hardware" [1] is currently enforced by the FAA via the Advisory Circular (AC) 20-152 [2] as a means of compliance and guidance for the design assurance of complex electronic hardware such as FPGAs, PLDs and ASICs in airborne systems. RTCA/DO-254 Section 6 (Verification Process) defines a set of verification objectives and methods that present several new challenges to design and verification engineers of airborne electronic hardware. This paper points out the most significant challenges that can be encountered during the hardware verification process of FPGA designs under DO-254 guidelines. More importantly, this paper proposes a verification methodology that replays RTL simulation during hardware testing at full speed utilizing the same simulation testbench as test vectors.