DocumentCode
2568779
Title
An SOI-Based 7.5/spl mu/m-Thick 0.15x0.15mm2 RFID Chip
Author
Usami, M. ; Sato, Akira ; Tanabe, Hiroshi ; Iwamatsu, Takanori ; Maegawa, Shigeto ; Ohji
Author_Institution
Hitachi, Tokyo
fYear
2006
fDate
6-9 Feb. 2006
Firstpage
1191
Lastpage
1200
Abstract
A 0.15times0.15mm2 RFID chip containing a 128b ROM is fabricated in a 0.18mum 4M SOI CMOS technology. It achieves 480mm read range with a 2.45GHz carrier for a reader output power of 300mW. The chip is thinned precisely by using an SOI buried oxide layer structure as an etch stop. An RFID antenna is connected to the chip by using a double-surface electrode
Keywords
CMOS integrated circuits; buried layers; radiofrequency identification; radiofrequency integrated circuits; read-only storage; silicon-on-insulator; 0.18 micron; 128 bit; 2.45 GHz; 300 mW; 4M SOI CMOS technology; 7.5 micron; RFID antenna; ROM; SOI buried oxide layer structure; SOI-based RFID chip; double-surface electrode; etch stop; reader output power; Capacitors; Circuits; Clocks; Costs; Electrodes; Radiofrequency identification; Read only memory; Rectifiers; Schottky diodes; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0079-1
Type
conf
DOI
10.1109/ISSCC.2006.1696165
Filename
1696165
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