An improved nonlinear empirical model applied to RF SOI LDMOSFET

This paper introduced a RF SOI LOMOS nonlinear empirical model and the method of its parameters extraction. We realized the whole model by coding it with Verilog-A language and validated the model with a SOI LDMOS device, which cell has 20 fingers with a 1 mum gate length and a total gate width of 1 mm. The parameters are extracted by an analytical methods combining with some optimization steps. At last, we show that the DC functions and their derivatives are continuous and accurate in the sub-threshokL linear and saturate regions; capacitance functions show good representation to the CV curve in multi-bias conditions; the good results of wide-band S parameter and power characteristics demonstrated the excellent accuracy of the model..