Voltage-island aware X-clock tree construction for power minimization

As the VLSI technology advances into the deep submicron era, power consumption becomes a critical issue for designing a high performance chip. Voltage-island design methodology based on multiple supplying voltages is one of efficient ways to reduce overall power consumption. This work proposes an algorithm to complete an X-clock tree that connects several voltage-islands. We first construct the X-clock tree for each voltage-island and then combine these X-clock trees based on a well-defined connection with inserted level-shifters to reduce power consumption. Experimental results show that two- and three-voltage-island-based X-clock trees can save 11.1% and 19.6% in power consumption, respectively.