Explanation and quantitative model for the matching behaviour of poly-silicon resistors

Author

Thewes, R. ; Brederlow, R. ; Dahl, C. ; Kollmer, U. ; Linnenbank, C.G. ; Holzapfl, B. ; Becker, J. ; Kissing, J. ; Kessel, S. ; Weber, W.

Author_Institution

Corp. Technol., Siemens AG, Munich, Germany

fYear

1998

fDate

6-9 Dec. 1998

Firstpage

771

Lastpage

774

Abstract

We investigate the matching behaviour of poly-silicon resistors. Experimental results from an analog CMOS process with three poly-silicon options are discussed and compared with a quantitative model which is developed using fit parameter-free analytical calculations and Monte-Carlo simulations. It is found that mismatch is directly proportional to the grain size. A relation is derived that allows us to optimize devices for low mismatch circuit applications.

Keywords

CMOS analogue integrated circuits; Monte Carlo methods; elemental semiconductors; grain size; integrated circuit modelling; resistors; silicon; Monte-Carlo simulations; Si; analog CMOS process; device optimization; fit parameter-free analytical calculations; grain size; low mismatch circuit applications; matching behaviour; polysilicon resistors; quantitative model; CMOS process; Circuit testing; Decoding; Electrical resistance measurement; Grain boundaries; Grain size; Resistors; Semiconductor device modeling; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1998. IEDM '98. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-4774-9

Type

conf

DOI

10.1109/IEDM.1998.746470

Filename

746470