Monte Carlo simulation of hot-carrier degradation in scaled MOS transistors for VLSI technology

This paper investigates the hot electron (HE) reliability of ultra thin gate oxide nMOSFETs by means of full band Monte Carlo (FBMC) simulation. First, a qualitative explanation of the smaller hot electron induced degradation (HEID) for thinner oxides is presented. Then, HEID in two different types of nMOSFET suitable for sub-0.1 /spl mu/m applications is analyzed as the devices are properly scaled below 0.1 /spl mu/m, addressing the question whether gate oxide thickness can be scaled down to 1 nm from the hot electron degradation point of view. Finally, the validity of usual extrapolation techniques of HEID lifetime from experimental data usually available in the range 2.5 V/spl les/V/sub DD//spl les/5 V to low voltages is addressed.