DocumentCode
2578522
Title
PCFICH channel design for LTE using FPGA
Author
Abbas, S. Syed Ameer ; Praba, R. Lakshumi ; Thiruvengadam, S.J.
Author_Institution
Dept. of Electron. & Commun. Eng., Mepco Schlenk Eng. Coll., Sivaksi, India
fYear
2011
fDate
3-5 June 2011
Firstpage
58
Lastpage
63
Abstract
Realization of transmitter and Receiver architecture for LTE is the major research work being carried out by implementation experts. There are four Control channels available in LTE for both uplink and downlink. The uplink control channel is PUCCH. The downlink control channels are PDCCH, PCFICH and PHICH. The Physical Control Format Indicator Channel(PCFICH) is one among the downlink physical control channel and it carries the number of OFDM symbols used by the PDCCH channel, denoted as Control Format Indicator(CFI). These control channels play a key role in the correct decoding of the payload information. The CFI is the first information received by the User and so is important for the system performance. In this paper, the realization of architecture for the PCFICH are done using FPGA, where the main aim is to estimate the CFI correctly in the receiver side. The simulations are done using Modelsim and are implemented in Xilinx Spartan 3E kit.
Keywords
Long Term Evolution; OFDM modulation; field programmable gate arrays; radio links; radio receivers; radio transmitters; wireless channels; FPGA; LTE; Modelsim; OFDM symbol; PCFICH channel design; PDCCH channel; Xilinx Spartan 3E kit; downlink control channel; physical control format indicator channel; receiver architecture; transmitter architecture; uplink control channel; Computer architecture; Downlink; Gold; OFDM; Phase shift keying; Receivers; Transmitters; CFI; FPGA; LTE;
fLanguage
English
Publisher
ieee
Conference_Titel
Recent Trends in Information Technology (ICRTIT), 2011 International Conference on
Conference_Location
Chennai, Tamil Nadu
Print_ISBN
978-1-4577-0588-5
Type
conf
DOI
10.1109/ICRTIT.2011.5972414
Filename
5972414
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