DocumentCode
2581473
Title
Implementing a simple continuous speech recognition system on an FPGA
Author
Melnikoff, S.J. ; Quigley, S.F. ; Russell, M.J.
Author_Institution
Electron., Electr. & Comput. Eng., Univ. of Birmingham, UK
fYear
2002
fDate
2002
Firstpage
275
Lastpage
276
Abstract
Speech recognition is a computationally demanding task, particularly the stage which uses Viterbi decoding for converting pre-processed speech data into words or sub-word units. We present an FPGA implementations of the decoder based on continuous hidden Markov models (HMMs) representing monophones, and demonstrate that it can process speech 75 times real time, using 45% of the slices of a Xilinx Virtex XCV1000.
Keywords
Viterbi decoding; field programmable gate arrays; hidden Markov models; speech recognition; FPGA implementations; Viterbi decoding; Xilinx Virtex XCV1000; continuous hidden Markov models; continuous speech recognition system; monophones; preprocessed speech data; Acceleration; Data mining; Decoding; Dictionaries; Feature extraction; Field programmable gate arrays; Hidden Markov models; Software performance; Speech processing; Speech recognition;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on
Print_ISBN
0-7695-1801-X
Type
conf
DOI
10.1109/FPGA.2002.1106682
Filename
1106682
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