Development and application of a macro model for flash EEPROM design

Author

O´Shea, Michael ; Concannon, Ann ; McCarthy, Kevin ; Lane, Bill ; Mathewson, Alan ; Slotboom, Michiel

Author_Institution

Nat. Microelectron. Res. Centre, Cork, Ireland

fYear

2000

fDate

2000

Firstpage

192

Lastpage

196

Abstract

The inclusion of embedded flash memory in systems-on-chip designs enables the addition of many new features. However to enable designers to embed flash memory in an efficient and competent manner, they must have the capability to simulate full circuit operation. Therefore a flexible flash EEPROM model is required. An accurate and numerically efficient model for the transient and DC characteristics of Fowler Nordheim (FN) based Flash EEPROM cells has been developed. The model has been extensively validated, using read, program and erase operations. The model has also been applied to several applications, in a typical structure. These display the ability of the model to accelerate the design cycle for applications which require flash memory

Keywords

application specific integrated circuits; circuit simulation; flash memories; integrated circuit design; integrated circuit modelling; transient analysis; Fowler Nordheim based cells; design cycle; embedded flash memory; erase operations; flash EEPROM design; full circuit operation; macro model; numerically efficient model; read operations; systems-on-chip designs; transient characteristics; Acceleration; CMOS process; Circuit simulation; Costs; EPROM; Electrons; Flash memory; Nonvolatile memory; Semiconductor device modeling; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International

Conference_Location

Arlington, VA

Print_ISBN

0-7803-6598-4

Type

conf

DOI

10.1109/ASIC.2000.880700

Filename

880700