• DocumentCode
    2582841
  • Title

    Low power controller optimization based on data path pattern extraction

  • Author

    Zou, Pei-Qing ; Tsui, Chi-ying

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Clear Water Bay, China
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    379
  • Lastpage
    383
  • Abstract
    In this paper, we propose a technique to reduce the power consumption of the controller FSM of a data path in the specification level. Pattern extraction and sub-FSM creation are carried out during the synthesis of a datapath and the corresponding controller. The technique increases the number of zeros at the output of the main controller. Together with FSM partitioning technique, the new FSM specification will increase the occurrence of self-loop which results in a reduction of power consumption of the final controller implementation
  • Keywords
    circuit optimisation; clocks; data flow graphs; finite state machines; logic partitioning; logic simulation; low-power electronics; probability; FSM; controller optimization; data path pattern extraction; low power controller; partitioning technique; self-loop; specification level; sub-FSM creation; Automata; Clocks; Control systems; Data engineering; Data mining; Energy consumption; Energy management; Hardware; Power engineering and energy; Stationary state;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International
  • Conference_Location
    Arlington, VA
  • Print_ISBN
    0-7803-6598-4
  • Type

    conf

  • DOI
    10.1109/ASIC.2000.880768
  • Filename
    880768