DocumentCode
2583075
Title
Exact closed form formula for partial mutual inductances of on-chip interconnects
Author
Zhong, Guoan ; Koh, Cheng-Kok
Author_Institution
Sch. of Electr. & Comput. Eng., Pritsker Corp., West Lafayette, IN, USA
fYear
2002
fDate
2002
Firstpage
428
Lastpage
433
Abstract
In this paper we propose a new exact closed form mutual inductance equation for on-chip interconnects. We express the mutual inductance between two parallel rectangular conductors as a weighted sum of self-inductances. We do not place any restrictions on the alignment of the two parallel rectangular conductors. Moreover they could be co-planar or reside on different layers. Most important, experimental results show that our formula is numerically more stable than that derived by Hoer and Love (1965) for long parallel onchip interconnects.
Keywords
VLSI; inductance; integrated circuit design; integrated circuit interconnections; numerical stability; alignment; exact closed form mutual inductance equation; numerical stability; on-chip interconnects; parallel rectangular conductors; partial mutual inductances; weighted self-inductance sum; Character generation; Conductors; Geometry; Inductance; Permeability; Very large scale integration; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
ISSN
1063-6404
Print_ISBN
0-7695-1700-5
Type
conf
DOI
10.1109/ICCD.2002.1106807
Filename
1106807
Link To Document