DocumentCode
2584952
Title
SCORE: SPICE compatible reluctance extraction
Author
Jiang, Rong ; Chen, Charlie Chung-Ping
Author_Institution
Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Volume
2
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
948
Abstract
Presently, a necessary modification to mainstream analysis tools prevents the direct application of reluctance k. In this paper, we propose a reluctance realization algorithm (RRA) by directly converting reluctances to circuit elements compatible with general simulation engines, such as SPICE. Reluctance realization is applicable to arbitrary circuit topology and no accuracy penalty is involved in the realization process. Since the stability of the converted circuit largely depends on the stability of the reluctance matrix, we present an efficient improved recursive bisection cutting algorithm (IRBCA) to obtain stability-guaranteed reluctance matrices, and integrate IRBCA and RRA into a SPICE compatible reluctance extraction tool, SCORE.
Keywords
SPICE; circuit stability; matrix algebra; network topology; realisation theory; SPICE compatible reluctance extraction; circuit elements; circuit stability; circuit topology; improved recursive bisection cutting algorithm; reluctance matrix; reluctance realization algorithm; simulation engines; simulation program with integrated circuit emphasis; Circuit simulation; Circuit stability; Equivalent circuits; H infinity control; Inductance; Integrated circuit interconnections; Integrated circuit modeling; Matrix converters; SPICE; Sparse matrices;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1269014
Filename
1269014
Link To Document