DocumentCode
2586132
Title
Packaging Design and Testing for High Temperature Applications > 15 °C
Author
Schreier-Alt, Thomas ; Rebholz, C. ; Ansorge, Frank
Author_Institution
Micro Mechatron. Centre, Fraunhofer Inst. Reliability & Microintegration IZM, Oberpaffenhofen
fYear
2007
fDate
16-18 April 2007
Firstpage
1
Lastpage
7
Abstract
The paper presents final results of a project called "high temperature packaging with new technologies" (HotPaNTs) with a consortium of well known partners from semiconductor and automotive industry. The project investigated system reliability at junction tempertures up to 200degC experimentally and by numerical simulations. Focus is on assembly, reliability testing of packaging technologies and in line electrical testing of the components at high temperatures. The design phase was accompanied by thermal simulations. We compared several package types (e.g. flip chip, QFN paddle up / down, QFP) concerning their performance under static and dynamic thermal loading. In detail two QFN packages have been studied: "paddle down" with main thermal pathways junction / board and "paddle up" with main pathway junction / air. A test chip with internal heat generators and temperature sensors was packaged in both housing types and assembled on different test boards. By numerical simulations and comparison with IR picture recordings, optimized thermal design guidelines (thermal vias, heat spreaders..) could be found.
Keywords
electronics packaging; flip-chip devices; reliability; HotPaNTs; IR picture recordings; QFN paddle up-down packaging; QFP packaging; dynamic thermal loading; flip chip package; heat spreaders; high temperature packaging; in line electrical testing; internal heat generators; junction tempertures; packaging design; packaging testing; static thermal loading; system reliability; temperature 200 degC; temperature sensors; test chip; thermal simulations; thermal vias; Assembly; Automotive engineering; Electronics packaging; Flip chip; Numerical simulation; Paper technology; Reliability; Semiconductor device packaging; Temperature; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems, 2007. EuroSime 2007. International Conference on
Conference_Location
London
Print_ISBN
1-4244-1105-X
Electronic_ISBN
1-4244-1106-8
Type
conf
DOI
10.1109/ESIME.2007.360023
Filename
4201190
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