DocumentCode
2586807
Title
Secure embedded processing through hardware-assisted run-time monitoring
Author
Arora, Divya ; Ravi, Srivaths ; Raghunathan, Anand ; Jha, Niraj K.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ, USA
fYear
2005
fDate
7-11 March 2005
Firstpage
178
Abstract
Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in "trusted" software that they execute. Security attacks exploit these vulnerabilities to trigger unintended program behavior, such as the leakage of sensitive data or the execution of malicious code. In this work, we present a hardware-assisted paradigm to enhance embedded system security by detecting and preventing unintended program behavior. Specifically, we extract properties of an embedded program through static program analysis, and use them as the bases for enforcing permissible program behavior in real-time as the program executes. We present an architecture for hardware-assisted run-time monitoring, wherein the embedded processor is augmented with a hardware monitor that observes the processor\´s dynamic execution trace, checks whether the execution trace falls within the allowed program behavior, and flags any deviations from the expected behavior to trigger appropriate response mechanisms. We present properties that can be used to capture permissible program behavior at different levels of granularity within a program, namely inter-procedural control flow, intra-procedural control flow, and instruction stream integrity. We also present a systematic methodology to design application-specific hardware monitors for any given embedded program. We have evaluated the hardware requirements and performance of the proposed architecture for several embedded software benchmarks. Hardware implementations using a commercial design flow, and architectural simulations using the SimpleScalar framework, indicate that the proposed technique can thwart several common software and physical attacks, facilitating secure program execution with minimal overheads.
Keywords
data flow analysis; embedded systems; security of data; software architecture; SimpleScalar framework; architectural simulations; dynamic execution trace; embedded system design; hardware monitor; hardware-assisted run-time monitoring; instruction stream integrity; inter-procedural control flow; intra-procedural control flow; permissible program behavior; secure embedded processing; security; static program analysis; Communication system security; Computer architecture; Data security; Embedded software; Embedded system; Hardware; Information security; Monitoring; National electric code; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2005. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2288-2
Type
conf
DOI
10.1109/DATE.2005.266
Filename
1395552
Link To Document