DocumentCode
2587207
Title
Systematic figure of merit computation for the design of pipeline ADC
Author
Barrandon, L. ; Crand, S. ; Houzet, D.
Author_Institution
IETR, Univ. de Rennes 1, France
fYear
2005
fDate
7-11 March 2005
Firstpage
277
Abstract
The emerging concept of SoC-AMS leads to research into new top-down methodologies to aid systems designers in sizing analog and mixed devices. The paper applies this idea to the high-level optimization of a pipeline ADC. Considering a given technology, it consists in comparing different configurations according to their imperfections and their architectures without FFT computation or time-consuming simulations. The final selection is based on a figure of merit.
Keywords
analogue integrated circuits; analogue-digital conversion; circuit optimisation; integrated circuit design; mixed analogue-digital integrated circuits; pipeline processing; system-on-chip; FFT; SoC-AMS; analog devices; figure of merit computation; high-level optimization; mixed devices; pipeline ADC design; top-down methodologies; Automatic testing; Design automation; Europe; Magneto electrical resistivity imaging technique; Pipelines; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2005. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2288-2
Type
conf
DOI
10.1109/DATE.2005.292
Filename
1395570
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