DocumentCode
2596542
Title
Stability and Reliability Investigation on Fully ECL Compatible High Speed- Logic ICs.
Author
Hosono, Y. ; Sato, H. ; Mira, Y. ; Ichikawa, S. ; Hirayama, H. ; Katsukawa, K. ; Ueda, K. ; Uetake, K. ; Noguchi, T. ; Kohzu, H.
Volume
87
Issue
1
fYear
1987
fDate
31929
Firstpage
49
Lastpage
52
Abstract
The electrical characteristics stability and reliability were investigated on newly developed high speed GaAs logic ICS. A resistor-loaded source-coupled FET logic (SCFL) was employed as a basic circuit architecture. The selectively epitaxial grown n+ - GaAs layers were aclopted for the contact regions of the WSi self-aligned gate FET. Maximum operating data rate of more than 2.6 Gb/s was achieved in these devices, guaranteeing sufficient supply voltage and phase margin. No failure has been observed in DC bias test for 3,000 hours and in RF operational test at 2 Gb/s for 7,000 hours.
Keywords
Circuit stability; Contacts; Electric variables; FETs; Gallium arsenide; Logic circuits; Logic devices; Radio frequency; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter-Wave Monolithic Circuits
Type
conf
DOI
10.1109/MCS.1987.1114514
Filename
1114514
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