DocumentCode
2596592
Title
Thermal qualification of 3D stacked die packages
Author
Rencz, M. ; Farkas, G. ; Szekely, V. ; Poppe, A. ; Courtois, B.
Author_Institution
MicReD, Budapest, Hungary
fYear
2004
fDate
8-10 Dec. 2004
Firstpage
30
Lastpage
35
Abstract
In this paper measurement experiments prove that the structure function evaluation of the thermal transient testing is capable to locate die attach failure(s), even in case of stacked die packages. Both the strength and the location of the die attach failure may be determined with the methodology of a fast thermal transient measurement and the subsequent computer evaluation. The paper summarizes shortly the theoretical background of the method, and presents the use of the methodology with several measured examples. With the help of the presented correction procedure even the accurate values of the thermal layer parameters, such as thermal resistances or capacitances may be determined with the discussed thermal qualification methodology.
Keywords
failure analysis; integrated circuit packaging; microassembling; thermal resistance measurement; 3D stacked die packages; correction procedure; die attach failure; structure function evaluation; thermal layer parameters; thermal qualification; thermal transient testing; Area measurement; Capacitance; Current measurement; Electrical resistance measurement; Electronic packaging thermal management; Microassembly; Qualifications; Resistance heating; Testing; Thermal resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference, 2004. EPTC 2004. Proceedings of 6th
Print_ISBN
0-7803-8821-6
Type
conf
DOI
10.1109/EPTC.2004.1396572
Filename
1396572
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