DocumentCode
2597173
Title
InP/Si heterogeneous integration by low-temperature bonding using metallic interlayer
Author
Higurashi, Eiji ; Yamamoto, Michitaka ; Kawai, Hiromu ; Sasaki, Yuta ; Suga, Tadatomo ; Shiratori, Yuta ; Ida, Minoru ; Akeyoshi, Tomoyuki
Author_Institution
RCAST, Univ. of Tokyo, Tokyo, Japan
fYear
2012
fDate
22-23 May 2012
Firstpage
101
Lastpage
101
Abstract
A low-temperature InP/Si integration method using Au-Au surface-activated bonding (SAB) at a temperature of 150 °C was demonstrated for hermetic chip size packaging. Au sealing rings (thickness: 500 nm, width: 100 μm) and Au thin film (thickness: 300 nm) were used as bonding layers for SAB at atmospheric pressure. Fracture images after die shear test showed the interface area was well bonded and the fractures typically occurred inside the InP bulk chips. Helium leak rate was smaller than 1 × 10-9 Pa·m3 s-1. These results indicate that Au-Au SAB in an atmospheric pressure environment can be applied to high quality hermetic packaging of InP-based optoelectronic and high-speed devices.
Keywords
III-V semiconductors; bonding processes; hermetic seals; indium compounds; semiconductor thin films; silicon; wide band gap semiconductors; InP-Si; SAB; atmospheric pressure; atmospheric pressure environment; bonding layers; fracture images; helium leak rate; hermetic chip size packaging; high quality hermetic packaging; high-speed devices; interface area; low-temperature bonding; low-temperature integration method; metallic interlayer; optoelectronic devices; sealing rings; size 100 mum; size 300 nm; size 50 nm; surface-activated bonding; temperature 150 degC; thin film; Bonding; Cavity resonators; Gold; Helium; Indium phosphide; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Temperature Bonding for 3D Integration (LTB-3D), 2012 3rd IEEE International Workshop on
Conference_Location
Tokyo
Print_ISBN
978-1-4673-0743-7
Type
conf
DOI
10.1109/LTB-3D.2012.6238062
Filename
6238062
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