• DocumentCode
    2598935
  • Title

    Optimization of double layer counter flow (DLCF) micro-channel heat sink used for cooling chips directly

  • Author

    Jeevan, K. ; Azid, I.A. ; Seetharamu, K.N.

  • Author_Institution
    Sch. of Mech. Eng., Univ. Sci. Malaysia, Penang, Malaysia
  • fYear
    2004
  • fDate
    8-10 Dec. 2004
  • Firstpage
    553
  • Lastpage
    558
  • Abstract
    Double layer counter flow (DLCF) microchannel heat sinks with rectangular channels have been modeled using FEM. The dimensions of DLCF such as height of channel, HC, width of channel, Wc and width of fin, Wf are variables selected for optimization in determining minimal thermal resistance using genetic algorithms (GA) and box optimization method for a fixed pumping power. Though both optimization techniques are widely used in constrained optimization problems such as the optimization of microchannel heat sinks, no direct comparison between the two techniques have been made. It is found GA performed marginally better than the box optimization method in terms of thermal performance. However GA required far less iteration time compared to box optimization method to complete the optimization. Later the GA is used to minimize thermal resistance of DLCF microchannel heat sink and compared with minimized thermal resistance of single layer counter flow (SLCF) microchannel heat sink and single layer parallel flow (SLPF) microchannel heat sink. It is found DLCF microchannel heat sink produced less thermal resistance compared to SLCF and SLPF microchannel heat sink.
  • Keywords
    cooling; finite element analysis; genetic algorithms; heat sinks; thermal management (packaging); thermal resistance; DLCF dimensions; DLCF microchannel heat sink; FEM; SLCF microchannel heat sink; SLPF microchannel heat sink; box optimization; chip cooling; constrained optimization problems; double layer counter flow optimization; genetic algorithms; iteration time; single layer counter flow; single layer parallel flow; thermal performance; thermal resistance; Constraint optimization; Cooling; Counting circuits; Heat pumps; Heat sinks; Heat transfer; Optimization methods; Resistance heating; Temperature; Thermal resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference, 2004. EPTC 2004. Proceedings of 6th
  • Print_ISBN
    0-7803-8821-6
  • Type

    conf

  • DOI
    10.1109/EPTC.2004.1396669
  • Filename
    1396669