• DocumentCode
    2599085
  • Title

    Effect of gate oxide scaling on RF performance of SOI MOSFETs

  • Author

    Emam, M. ; Vanhoenacker-Janvier, D. ; Raskin, J. -P

  • Author_Institution
    Electr. Eng. Dept., Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium
  • fYear
    2011
  • fDate
    17-19 Jan. 2011
  • Firstpage
    73
  • Lastpage
    76
  • Abstract
    Although scaling down the dimensions of transistors is a main requirement for digital applications, it could be problematic for RF applications. This paper shows the importance of relaxing the scaling rules for the gate oxide thickness in order to optimize the benefits of scaling.
  • Keywords
    MOSFET; silicon-on-insulator; MOSFET; RF performance; SOI; digital applications; gate oxide scaling; Capacitance; Doping; Logic gates; MOSFETs; Performance evaluation; Radio frequency; Gate Oxide thickness; Low Voltage Low Power; MOSFET; Partially-Depleted Silicon-on-Insulator technology; RF characterization; Scaling; analog;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2011 IEEE 11th Topical Meeting on
  • Conference_Location
    Phoenix, AZ
  • Print_ISBN
    978-1-4244-8060-9
  • Type

    conf

  • DOI
    10.1109/SIRF.2011.5719322
  • Filename
    5719322
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2599085