DocumentCode
2600707
Title
Degradation Phenomena of Planar Si Devices Due to Surface and Bulk Effects
Author
Kurz, Bruno
Author_Institution
Manager, Integrated Circuit Development, Amperex Electronic Corporation, 99 Bald Hill Road, Cranston, Rhode Island
fYear
1967
fDate
Nov. 1967
Firstpage
47
Lastpage
65
Abstract
Planar devices of almost every producer show to some extent serious degradation failures under heavy work conditions. A collector base voltage test at high temperature inverts often the n+-collector surface into a p-layer. High collector leakage currents are resulting. An emitter-base cut off-test at a reverse current of some mA destroys locally the emitter base junction at its surface. A strong decrease of the current amplification factor is resulting. Both failure mechanisms are analysed, some technological solutions to these problems are given.
Keywords
Capacitance; Capacitance-voltage characteristics; Current measurement; Degradation; Failure analysis; Plastics; Silicon compounds; Temperature; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 1967. Sixth Annual
Conference_Location
Los Angeles, CA, USA
ISSN
0735-0791
Type
conf
DOI
10.1109/IRPS.1967.362394
Filename
4207757
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