DocumentCode
2601433
Title
Correlation of SIMOX processing and device performance by combined DLTS and transistor analysis
Author
McLarty, P.K. ; Mazhari, B. ; Potamianos, C.N. ; Cristoloveanu, S. ; Ioannou, D.E. ; Hughes, H.L.
Author_Institution
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
fYear
1989
fDate
3-5 Oct 1989
Firstpage
31
Lastpage
32
Abstract
Summary form only given. The authors report that current deep-level transient spectroscopy (DLTS) studies on MOSFETs fabricated in SIMOX (separation by implantation of oxygen) material did not detect any electrically active deep states. As appropriate process control results in reduced deep trap concentrations, DLTS should be complemented by other measurements in order to assess the material and device quality. The SIMOX wafers under investigation were fabricated with implantation doses of 1.4×1018, 1.8×1018 , and 2.1×1018 cm-2. The implantation energy was 150 keV and they were annealed at 1275°C for 5-10 hours in a N2+1%O2 ambient. An epilayer of 0.3 μm was grown on all the substrates prior to device fabrication. Short-channel transistors were fabricated with conventional CMOS technology. It was found that the back-channel mobilities varied from 120-500 cm2/Vs, the threshold voltages from 20-40 V, and the density of interface states from 4×1011 to 2×1012 cm-2 eV-1. In contrast with the back-channel the properties of the front-channel showed much less variation
Keywords
annealing; carrier mobility; deep level transient spectroscopy; insulated gate field effect transistors; interface electron states; ion implantation; semiconductor technology; semiconductor-insulator boundaries; 1275 degC; 150 keV; 20 to 40 V; CMOS technology; DLTS; MOSFETs; N2-O2 ambient; SIMOX processing; Si:O; annealing temperature; back-channel mobilities; deep trap concentrations; density of interface states; device performance; device quality; front channel properties; implantation doses; implantation energy; material quality; process control; short channel transistors; threshold voltages; transistor analysis; Annealing; CMOS technology; Contamination; Educational institutions; Interface states; Laboratories; MOSFETs; Performance analysis; Pollution measurement; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SOS/SOI Technology Conference, 1989., 1989 IEEE
Conference_Location
Stateline, NV
Type
conf
DOI
10.1109/SOI.1989.69751
Filename
69751
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