• DocumentCode
    2602484
  • Title

    The price of certainty: iterative decoding from a total power perspective

  • Author

    Sahai, Anant ; Grover, Pulkit

  • Author_Institution
    Dept. of EECS, Univ. of California at Berkeley, Berkeley, CA
  • fYear
    2008
  • fDate
    Jan. 27 2008-Feb. 1 2008
  • Firstpage
    293
  • Lastpage
    302
  • Abstract
    The classical problem of reliable point-to-point digital communication is to achieve a low probability of error while keeping the rate high and the power consumption small. Traditionally, explicit power-dependent (idealized) models for the communication channel are used to study the transmit power required. The resulting dasiawaterfallpsila curves convey the revolutionary idea that unboundedly low probabilities of bit-error are attainable using only finite transmit power. However, it has long been observed that the decoder complexity, and hence the total power consumption, goes up when attempting to use codes that operate close to the waterfall curve. This paper explores this theme by using explicit models for computation and power consumption at the decoder. To get a lower bound, an ASIC-oriented model is given that allows for extreme parallelism in implementation. The decoder architecture is in the spirit of iterative decoding for sparse-graph codes, but is further idealized in that it allows for more computational power than is currently known to be implementable. Generalized sphere-packing arguments are used to derive bounds on the number of decoding iterations needed for any possible code given only the rate and the desired probability of error. The lower bound is plotted to show an unavoidable tradeoff between the average bit-error probability and the total power used in transmission and decoding. In the spirit of conventional waterfall curves, we call these ldquowatersliderdquo curves.
  • Keywords
    application specific integrated circuits; digital communication; error statistics; iterative decoding; radio links; telecommunication channels; ASIC-oriented model; bit error probability; certainty price; communication channel; iterative decoding; point-to-point digital communication; power consumption; sparse graph codes; total power perspective; Circuits; Communication channels; Computational modeling; Computer architecture; Concrete; Costs; Digital communication; Energy consumption; Iterative decoding; Parallel processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Theory and Applications Workshop, 2008
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    978-1-4244-2670-6
  • Type

    conf

  • DOI
    10.1109/ITA.2008.4601064
  • Filename
    4601064