OS-Level IPC Implementation in Complementary Multi-processor Systems

Author

Pei, Ke ; Zhang, Gang ; Qing Chang

Author_Institution

Coll. of Inf. Eng., Taiyuan Univ. of Technol., Taiyuan, China

fYear

2010

fDate

17-18 April 2010

Firstpage

74

Lastpage

77

Abstract

Most of embedded multiprocessor platforms are ideal for running diverse operating systems and implementing different applications. Inter-processor communication interface makes it possible for an embedded multi-processor system to easily support multiple subsystems parallel processing. This paper propose a kind of OS-level communication interface implementing method based-on HPI in the Complementary Multi-processor System and present the primary principles and corresponding DSP side code structure for HPI. Take a single-board embedded multimedia system which was integrated three embedded microprocessors (PXA255, TMS320DM642 and SM501) as hardware platform, detailed description of how implement tasks communication and data transform by HPI between different embedded OS(ARM-Linux and μC/OS-II) running on ARM and DSP separately.

Keywords

embedded systems; multimedia computing; multiprocessing systems; multiprocessor interconnection networks; operating systems (computers); ARM; DSP; HPI; OS level IPC implementation; complementary multiprocessor systems; embedded multiprocessor platforms; interprocessor communication; operating systems; single board embedded multimedia system; Algorithm design and analysis; Coprocessors; Digital signal processing; Educational institutions; Embedded system; Hardware; Logic devices; Multicore processing; Parallel processing; Registers; µC/OS-II; CMPS; HPI; IPC Interface; TMS320DM642;

fLanguage

English

Publisher

ieee

Conference_Titel

Wearable Computing Systems (APWCS), 2010 Asia-Pacific Conference on

Conference_Location

Shenzhen

Print_ISBN

978-1-4244-6467-8

Electronic_ISBN

978-1-4244-6468-5

Type

conf

DOI

10.1109/APWCS.2010.26

Filename

5481090