Multi-probe Two-Dimensional Mapping of Off-State Degradation in DeNMOS Transistors: How and Why Interface Damage Predicts Gate Dielectric Breakdown

Through a combination of measurements techniques, we show that the generation of both interface and bulk traps during off-state stress in drain extended NMOS transistors are driven by the same physical mechanism and as such have similar time and voltage dependencies. We also show that the peak interface damage location (obtained from charge pumping measurement) along with asymmetric percolation model successfully interpret the observed Weibull slope of dielectric breakdown during off-state stress. Our analysis suggests the intriguing possibility of replacing time consuming off-state TDDB measurements by simple charge pumping analysis.