SUAVE: painless extension for an object-oriented VHDL

The SUAVE project aims to introduce object-oriented extensions to data modeling into VHDL in a way that does not disturb the existing language or its use. Designers regularly define abstract data types by using aspects of VHDL´s type system, subprograms, and packages. The SUAVE approach builds on these basic mechanisms by strengthening the facilities for encapsulation and adding an inheritance mechanism. In addition to supporting object-orientation, these extended mechanisms improve the expressiveness of VHDL across the modeling spectrum, from high-level to gate-level. By choosing an incremental and evolutionary approach to extensions, SUAVE avoids major additions to the language that would complicate choice of mechanisms for expressing a design. The paper outlines the SUAVE extensions and illustrates their use through some examples. The mechanisms and examples are readily understood as incremental extensions to current modeling practices, hence “painless extension”