• DocumentCode
    2604531
  • Title

    Techniques in Failure Analysis of MOS Devices

  • Author

    Gajda, J.J.

  • Author_Institution
    IBM System Products Division, East Fishkill Facility, Hopewell Junction, New York 12533
  • fYear
    1974
  • fDate
    27120
  • Firstpage
    30
  • Lastpage
    37
  • Abstract
    The greatest concern on MOB devices is the physical integrity of the gate oxide. Leakage paths and/or shorts through defect sites in the oxide are a major device reliability problem. Optical microscopy is tedious and often does not resolve the defects. With this in mind, copper decoration techniques were developed that could reveal oxide failures sites down to 0.1¿m size. The technique has isolated various failure mechanisms on MOS devices. This failure analysis capability has enhanced the ability to control the MOS process.
  • Keywords
    Copper; Electron optics; Etching; FETs; Failure analysis; MOS devices; Optical microscopy; Process control; Scanning electron microscopy; Sprites (computer);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 1974. 12th Annual
  • Conference_Location
    Las Vegas, NV, USA
  • ISSN
    0735-0791
  • Type

    conf

  • DOI
    10.1109/IRPS.1974.362623
  • Filename
    4208001