• DocumentCode
    2610898
  • Title

    Efficient floorplan enumeration using dynamic programming

  • Author

    Prasad, S.C. ; Kollaritsch, P.W. ; Anirudhan, P. ; Hwang, D.K. ; Lusky, S. ; Farrow, R.

  • Author_Institution
    Texas Instruments, Inc., Dallas, TX, USA
  • fYear
    1993
  • fDate
    3-6 May 1993
  • Firstpage
    1766
  • Abstract
    The problem of determining floorplans with optimum area utilization is addressed. To enable the application of dynamic programming, the problem is first transformed into that of determining all floorplans within a specified tolerance of the perfect floorplan. It is shown that for slicing floorplans the problem of enumerating floorplans is related to enumerating two-partitions. Tests to identify redundant partial floorplans are derived, and it is shown that abandoning them does not violate the principle of optimality of dynamic programming. A novel ordering of two-partitions is derived, which enables determination of the wire length cost of successive two-partitions in constant time. Results for a set of benchmark circuits are presented
  • Keywords
    circuit layout CAD; dynamic programming; logic CAD; logic partitioning; redundancy; wiring; area utilization; benchmark circuits; dynamic programming; floorplan enumeration; redundant partial floorplans; slicing; two-partitions; wire length cost; Circuit simulation; Costs; Dynamic programming; Instruments; Laboratories; Partitioning algorithms; Shape; Simulated annealing; Testing; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • Print_ISBN
    0-7803-1281-3
  • Type

    conf

  • DOI
    10.1109/ISCAS.1993.394086
  • Filename
    394086