Enhanced IP-XACT Platform Descriptions for Automatic Generation from UML/MARTE of Fast Performance Models for DSE

This paper presents a framework which, starting from a UML/MARTE model of the embedded system, relies on an enhanced IP-XACT description of the platform for the automatic generation of fast performance executable models. The IP-XACT description of the HW architecture is automatically generated from the UML/MARTE model. The enhancement proposed extends the current capabilities of the IP-XACT standard in order to add semantic information to the HW architecture and to support the integration of Hardware Dependent Software (HdS). This way, HW and SW aspects of the integration of a component in a virtual platform model are covered. The applicability of the proposed extensions is shown by supporting the proposed IP-XACT descriptions at the front-end of a simulation infrastructure suited for fast performance assessment, and for supporting design space exploration.